Class to emulate the CPU. More...

#include <cpu.hpp>

Public Member Functions
	CPU ()
	Construct a new CPU object.

void	connectBus (Bus *bus)
	Connects Bus to the CPU.

void	clock ()
	Clocks the CPU once.

void	show_regs ()
	Shows the values of the registers.

void	reset ()
	Resets the CPU to its initial state.

Private Member Functions
void	load_next_ins ()
	Load the next instruction into the instruction register.

void	decode_and_execute ()
	Decodes and executes the instruction in the instruction register.

uint32_t	read32 (uint32_t addr)
	Read a 32 bit word from the bus.

void	write32 (uint32_t addr, uint32_t data)
	Write a 32 bit word to the bus.

uint16_t	read16 (uint32_t addr)
	Read a 16 bit word from the bus.

void	write16 (uint32_t addr, uint16_t data)
	Write a 16 bit word to the bus.

uint8_t	read8 (uint32_t addr)
	Read a 8 bit word from the bus.

void	write8 (uint32_t addr, uint8_t data)
	Write a 8 bit word to the bus.

void	branch (uint32_t offset)
	Branches to the given offset.

void	set_reg (uint8_t reg, uint32_t data)
	Sets the value of the given register from the general purpose registers.

uint32_t	get_reg (uint8_t reg)
	Gets the value of the given register from the general purpose registers.

void	load_regs ()
	Loads the registers from the load queue.

void	conf_ins_lookup ()
	Configures the instruction lookup table.

void	conf_mnemonic_lookup ()
	Configures the mnemonic lookup table. (for debugging)

void	LUI ()
	Load Upper Immediate.

void	ORI ()
	Bitwise OR Immediate.

void	SW ()
	Store Word.

void	ADDIU ()
	Add Immediate Unsigned.

void	J ()
	Unconditional Jump.

void	BNE ()
	Branch on Not Equal.

void	ADDI ()
	Add Immediate.

void	LW ()
	Load Word.

void	SH ()
	Store Halfword.

void	JAL ()
	Jump and Link.

void	ANDI ()
	Bitwise AND Immediate.

void	SB ()
	Store Byte.

void	LB ()
	Load Byte.

void	BEQ ()
	Branch on Equal.

void	BGTZ ()
	Branch on Greater Than Zero.

void	BLEZ ()
	Branch on Less Than or Equal to Zero.

void	LBU ()
	Load Byte Unsigned.

void	SLTI ()
	Set on Less Than Immediate.

void	SLTIU ()
	Set on Less Than Immediate Unsigned.

void	SPECIAL ()
	Looks up and executes the appropriate SPECIAL instruction.

void	SLL ()
	Shift Left Logical.

void	OR ()
	Bitwise OR.

void	SLTU ()
	Set on Less Than Unsigned.

void	ADDU ()
	Add Unsigned.

void	JR ()
	Jump Register.

void	AND ()
	Bitwise AND.

void	ADD ()
	Add.

void	JALR ()
	Jump and Link Register.

void	SRA ()
	Shift Right Arithmetic.

void	SUBU ()
	Subtract Unsigned.

void	DIV ()
	Divide.

void	MFLO ()
	Move From LO.

void	SRL ()
	Shift Right Logical.

void	DIVU ()
	Divide Unsigned.

void	MFHI ()
	Move From HI.

void	SLT ()
	Set on Less Than.

void	BLGE ()
	Choose between BLTZAL, BGEZAL, BLTZ, BGEZ.

void	BLTZ ()
	Branch on Less Than Zero.

void	BGEZ ()
	Branch on Greater Than or Equal to Zero.

void	BGEZAL ()
	Branch on Greater Than or Equal to Zero And Link.

void	BLTZAL ()
	Branch on Less Than Zero And Link.

void	COP0 ()
	Looks up and executes the appropriate coprocessor 1 instruction.

void	MTC0 ()
	Move to Coprocessor 0.

void	MFC0 ()
	Move From Coprocessor 0.

void	COP1 ()
	Looks up and executes the appropriate coprocessor 1 instruction. (UNUSED)

void	COP2 ()
	Looks up and executes the appropriate coprocessor 2 (Graphics) instruction.

void	COP3 ()
	Looks up and executes the appropriate coprocessor 3 instruction. (UNUSED)

Private Attributes
Bus *	bus
	Pointer to the Bus object.

std::queue< RegisterLoad >	load_queue
	Queue to store the loads to the general purpose registers.

uint32_t	pc = 0
	Program counter.

uint32_t	ir
	Instruction register.

uint32_t	ir_next
	Instruction immediately after the current instruction in the memory.

Instruction	ins
	Instruction in the form of the Instruction structure.

uint32_t	regs [32] = {0xdeaddeed}
	General purpose registers.

uint32_t	hi = 0
	HI register.

uint32_t	lo = 0
	LO register.

uint32_t	cop0_status
	COP0 status register.

uint32_t	cop0_bpc
	COP0 breakpoint exception register.

uint32_t	cop0_bda
	COP0 breakpoint exception register (data)

uint32_t	cop0_dcic
	COP0 breakpoint exception register (hardware)

uint32_t	cop0_bdam
	Bitmask applied to COP0 breakpoint exception register (data)

uint32_t	cop0_bpcm
	Bitmask applied on COP0 breakpoint exception register.

uint32_t	cop0_cause
	COP0 cause register.

std::map< uint8_t, void(CPU::*)()>	lookup_op
	Lookup table for instructions.

std::map< uint8_t, void(CPU::*)()>	lookup_special
	Lookup table for special instructions (opcode = 0b000000)

std::map< uint8_t, void(CPU::*)()>	lookup_cop0
	Lookup table for cop0 instructions (opcode = 0b010000)

std::map< uint8_t, void(CPU::*)()>	lookup_cop2
	Lookup table for cop1 instructions (opcode = 0b010001)

std::map< uint8_t, std::string >	lookup_mnemonic_op
	Lookup table for the mnemonics of instructions.

std::map< uint8_t, std::string >	lookup_mnemonic_special
	Lookup table for the mnemonics of special instructions.

Detailed Description

Class to emulate the CPU.

Implements the CPU of the PSX (The MIPS R3000A CPU).

Definition at line 144 of file cpu.hpp.

Constructor & Destructor Documentation

◆ CPU()

CPU::CPU ( )

Construct a new CPU object.

Sets the initial values of the registers and the initializes the opcode lookup tables.

References: reset conf_ins_lookup conf_mnemonic_lookup

Definition at line 16 of file cpu.cpp.

Member Function Documentation

◆ ADD()

void CPU::ADD ( )

private

Add.

Signed addition. TODO: Handle signed overflow exception

Exceptions

std::runtime_error if signed overflow occurs.

References: Instruction::rs Instruction::rt Instruction::rd get_reg set_reg

Definition at line 130 of file ins_special.cpp.

◆ ADDI()

void CPU::ADDI ( )

private

Add Immediate.

Signed addition.

Exceptions

std::runtime_error if signed overflow occurs.

References: Instruction::imm Instruction::rs Instruction::rt get_reg set_reg

Definition at line 137 of file ins.cpp.

◆ ADDIU()

void CPU::ADDIU ( )

private

Add Immediate Unsigned.

References: set_reg get_reg Instruction::rt Instruction::rs Instruction::imm

Definition at line 75 of file ins.cpp.

◆ ADDU()

void CPU::ADDU ( )

private

Add Unsigned.

References: Instruction::rs Instruction::rt Instruction::rd get_reg set_reg

Definition at line 79 of file ins_special.cpp.

◆ AND()

void CPU::AND ( )

private

Bitwise AND.

References: Instruction::rs Instruction::rt Instruction::rd get_reg set_reg

Definition at line 109 of file ins_special.cpp.

◆ ANDI()

void CPU::ANDI ( )

private

Bitwise AND Immediate.

References: Instruction::rs Instruction::rt Instruction::imm get_reg set_reg

Definition at line 248 of file ins.cpp.

◆ BEQ()

void CPU::BEQ ( )

private

Branch on Equal.

References: Instruction::imm Instruction::rs Instruction::rt get_reg branch

Definition at line 329 of file ins.cpp.

◆ BGEZ()

void CPU::BGEZ ( )

private

Branch on Greater Than or Equal to Zero.

References: Instruction::imm Instruction::rs get_reg branch

Definition at line 508 of file ins.cpp.

◆ BGEZAL()

void CPU::BGEZAL ( )

private

Branch on Greater Than or Equal to Zero And Link.

References: Instruction::imm Instruction::rs get_reg branch set_reg

Definition at line 531 of file ins.cpp.

◆ BGTZ()

void CPU::BGTZ ( )

private

Branch on Greater Than Zero.

References: Instruction::imm Instruction::rs get_reg branch

Definition at line 353 of file ins.cpp.

◆ BLEZ()

void CPU::BLEZ ( )

private

Branch on Less Than or Equal to Zero.

References: Instruction::imm Instruction::rs get_reg branch

Definition at line 377 of file ins.cpp.

◆ BLGE()

void CPU::BLGE ( )

private

Choose between BLTZAL, BGEZAL, BLTZ, BGEZ.

References: BLTZAL BGEZAL BLTZ BGEZ

Definition at line 427 of file ins.cpp.

◆ BLTZ()

void CPU::BLTZ ( )

private

Branch on Less Than Zero.

References: Instruction::imm Instruction::rs get_reg branch

Definition at line 458 of file ins.cpp.

◆ BLTZAL()

void CPU::BLTZAL ( )

private

Branch on Less Than Zero And Link.

References: Instruction::imm Instruction::rs get_reg branch set_reg

Definition at line 481 of file ins.cpp.

◆ BNE()

void CPU::BNE ( )

private

Branch on Not Equal.

References: Instruction::imm Instruction::rs Instruction::rt get_reg branch

Definition at line 109 of file ins.cpp.

◆ branch()

void CPU::branch ( uint32_t offset )

private

Branches to the given offset.

The offset is multiplied by 4 before branching.

Parameters

offset Offset to branch to

Definition at line 44 of file cpu_utils.cpp.

◆ clock()

void CPU::clock ( )

Clocks the CPU once.

Executes the load_next_ins and decode_and_execute functions. Implements the load delay by copying the output registers to the input registers after the instruction is executed.

References: load_next_ins decode_and_execute load_regs

Definition at line 33 of file cpu.cpp.

◆ conf_ins_lookup()

void CPU::conf_ins_lookup ( )

private

Configures the instruction lookup table.

Definition at line 36 of file cpu_conf.cpp.

◆ conf_mnemonic_lookup()

void CPU::conf_mnemonic_lookup ( )

private

Configures the mnemonic lookup table. (for debugging)

Definition at line 90 of file cpu_conf.cpp.

◆ connectBus()

void CPU::connectBus ( Bus * bus )

inline

Connects Bus to the CPU.

Used by the constructor of Bus to connect the CPU to the Bus.

Parameters

bus	Pointer to the bus structure

Definition at line 155 of file cpu.hpp.

◆ COP0()

void CPU::COP0 ( )

private

Looks up and executes the appropriate coprocessor 1 instruction.

Exceptions

std::runtime_error if the instruction is not mapped in the lookup_cop0 table.

Definition at line 10 of file ins_cop0.cpp.

◆ COP1()

void CPU::COP1 ( )

private

Looks up and executes the appropriate coprocessor 1 instruction. (UNUSED)

Definition at line 46 of file cpu.cpp.

◆ COP2()

void CPU::COP2 ( )

private

Looks up and executes the appropriate coprocessor 2 (Graphics) instruction.

Definition at line 7 of file ins_cop2.cpp.

◆ COP3()

void CPU::COP3 ( )

private

Looks up and executes the appropriate coprocessor 3 instruction. (UNUSED)

Definition at line 55 of file cpu.cpp.

◆ decode_and_execute()

void CPU::decode_and_execute ( )

private

Decodes and executes the instruction in the instruction register.

Uses the opcode to lookup the instruction in the opcode lookup table and executes the appropriate function.

Exceptions

std::runtime_error if the instruction is not mapped in the opcode lookup table.

Definition at line 25 of file cpu_utils.cpp.

◆ DIV()

void CPU::DIV ( )

private

Divide.

Exceptions

std::runtime_error if division by zero occurs.

References: Instruction::rs Instruction::rt get_reg lo hi

Definition at line 220 of file ins_special.cpp.

◆ DIVU()

void CPU::DIVU ( )

private

Divide Unsigned.

Exceptions

std::runtime_error if division by zero occurs.

References: Instruction::rs Instruction::rt get_reg lo hi

Definition at line 296 of file ins_special.cpp.

◆ get_reg()

uint32_t CPU::get_reg ( uint8_t reg )

private

Gets the value of the given register from the general purpose registers.

Parameters

reg	Register to get the value of

Returns: uint32_t Value of the register

Definition at line 74 of file cpu_utils.cpp.

◆ J()

void CPU::J ( )

private

Unconditional Jump.

References: Instruction::addr

Definition at line 94 of file ins.cpp.

◆ JAL()

void CPU::JAL ( )

private

Jump and Link.

Stores the address of the next instruction in register 31 and jumps to the address given by the instruction.

References: Instruction::addr set_reg

Definition at line 228 of file ins.cpp.

◆ JALR()

void CPU::JALR ( )

private

Jump and Link Register.

Use a register (specified by the instruction in rd) to store the address of the next instruction and jump to the address given by the register specified by the instruction in rs.

References: Instruction::rs Instruction::rd set_reg

Definition at line 160 of file ins_special.cpp.

◆ JR()

void CPU::JR ( )

private

Jump Register.

References: Instruction::rs get_reg

Definition at line 92 of file ins_special.cpp.

◆ LB()

void CPU::LB ( )

private

Load Byte.

Sign extends the byte read from memory.

References: Instruction::imm Instruction::rs Instruction::rt get_reg read8 RegisterLoad

Definition at line 301 of file ins.cpp.

◆ LBU()

void CPU::LBU ( )

private

Load Byte Unsigned.

Unsigned load. Zero extends the byte read from memory.

References: Instruction::imm Instruction::rs Instruction::rt get_reg read8 RegisterLoad

Definition at line 405 of file ins.cpp.

◆ load_next_ins()

void CPU::load_next_ins ( )

private

Load the next instruction into the instruction register.

Executes a read32 at the address given by the program counter and increments the program counter by 4.

Definition at line 10 of file cpu_utils.cpp.

◆ load_regs()

void CPU::load_regs ( )

private

Loads the registers from the load queue.

Decrements the delay of each load in the load queue. If the delay is 0, the data is written to the register.

Definition at line 85 of file cpu_utils.cpp.

◆ LUI()

void CPU::LUI ( )

private

Load Upper Immediate.

References: set_reg Instruction::rt Instruction::imm

Definition at line 13 of file ins.cpp.

◆ LW()

void CPU::LW ( )

private

Load Word.

Sign extends the immediate value read from memory.

References: Instruction::imm Instruction::rs Instruction::rt get_reg read32 RegisterLoad

Definition at line 173 of file ins.cpp.

◆ MFC0()

void CPU::MFC0 ( )

private

Move From Coprocessor 0.

Exceptions

std::runtime_error if an unhandled register is read from. (Not one of the following: status, cause).

References: Instruction::rd Instruction::rt cop0_status cop0_cause set_reg RegisterLoad

Definition at line 90 of file ins_cop0.cpp.

◆ MFHI()

void CPU::MFHI ( )

private

Move From HI.

TODO: Stall until the mul/div is complete.

References: Instruction::rd set_reg hi

Definition at line 326 of file ins_special.cpp.

◆ MFLO()

void CPU::MFLO ( )

private

Move From LO.

TODO: Stall until the mul/div is complete.

References: Instruction::rd set_reg lo

Definition at line 262 of file ins_special.cpp.

◆ MTC0()

void CPU::MTC0 ( )

private

Move to Coprocessor 0.

Exceptions

std::runtime_error	if nonzero value is written to any register other than status. (TODO: Handle these cases)
std::runtime_error	if an unhandled register is written to. (Not one of the following: status, cause, bda, bpcm, bpc, dcic, bdam).

References: Instruction::rd Instruction::rt cop0_status cop0_cause get_reg set_reg

Definition at line 37 of file ins_cop0.cpp.

◆ OR()

void CPU::OR ( )

private

Bitwise OR.

References: set_reg get_reg Instruction::rd Instruction::rs Instruction::rt

Definition at line 47 of file ins_special.cpp.

◆ ORI()

void CPU::ORI ( )

private

Bitwise OR Immediate.

References: set_reg get_reg Instruction::rs Instruction::imm

Definition at line 27 of file ins.cpp.

◆ read16()

uint16_t CPU::read16 ( uint32_t addr )

private

Read a 16 bit word from the bus.

Parameters

addr	Address to read from

Returns: uint16_t Data read from the bus

References: Bus::read16_cpu

Definition at line 41 of file cpu_rw.cpp.

◆ read32()

uint32_t CPU::read32 ( uint32_t addr )

private

Read a 32 bit word from the bus.

Parameters

addr	Address to read from

Returns: uint32_t Data read from the bus

References: Bus::read32_cpu

Definition at line 13 of file cpu_rw.cpp.

◆ read8()

uint8_t CPU::read8 ( uint32_t addr )

private

Read a 8 bit word from the bus.

Parameters

addr	Address to read from

Returns: uint8_t Data read from the bus

References Bus::read8_cpu

Definition at line 69 of file cpu_rw.cpp.

◆ reset()

void CPU::reset ( )

Resets the CPU to its initial state.

Sets all the general purpose registers (except the zero register) to 0xdeadbeef, the HI and LO registers to 0xdeadbeef, the PC to 0xbfc00000, and the coprocessor 0 registers to 0x00000000.

Definition at line 9 of file cpu_conf.cpp.

◆ SB()

void CPU::SB ( )

private

Store Byte.

TODO: Implement Cache

References: Instruction::imm Instruction::rs Instruction::rt get_reg write8 cop0_status

Definition at line 268 of file ins.cpp.

◆ set_reg()

void CPU::set_reg	(	uint8_t	reg,
		uint32_t	data )

private

Sets the value of the given register from the general purpose registers.

Parameters

reg	Register to set
data	Value to set the register to

Definition at line 61 of file cpu_utils.cpp.

◆ SH()

void CPU::SH ( )

private

Store Halfword.

TODO: Implement Cache

References: Instruction::imm Instruction::rs Instruction::rt get_reg write16 cop0_status

Definition at line 199 of file ins.cpp.

◆ show_regs()

void CPU::show_regs ( )

Shows the values of the registers.

Used for debugging.

Definition at line 106 of file cpu_utils.cpp.

◆ SLL()

void CPU::SLL ( )

private

Shift Left Logical.

References: set_reg Instruction::rd Instruction::rt Instruction::shamt

Definition at line 32 of file ins_special.cpp.

◆ SLT()

void CPU::SLT ( )

private

Set on Less Than.

References: Instruction::rs Instruction::rt Instruction::rd get_reg set_reg

Definition at line 342 of file ins_special.cpp.

◆ SLTI()

void CPU::SLTI ( )

private

Set on Less Than Immediate.

References: Instruction::rs Instruction::rt Instruction::imm get_reg set_reg

Definition at line 559 of file ins.cpp.

◆ SLTIU()

void CPU::SLTIU ( )

private

Set on Less Than Immediate Unsigned.

References: Instruction::rs Instruction::rt Instruction::imm get_reg set_reg

Definition at line 581 of file ins.cpp.

◆ SLTU()

void CPU::SLTU ( )

private

Set on Less Than Unsigned.

References: Instruction::rs Instruction::rt Instruction::rd get_reg set_reg

Definition at line 63 of file ins_special.cpp.

◆ SPECIAL()

void CPU::SPECIAL ( )

private

Looks up and executes the appropriate SPECIAL instruction.

Exceptions

std::runtime_error if the instruction is not mapped in the lookup_special table.

Definition at line 10 of file ins_special.cpp.

◆ SRA()

void CPU::SRA ( )

private

Shift Right Arithmetic.

References: Instruction::rt Instruction::shamt get_reg set_reg

Definition at line 178 of file ins_special.cpp.

◆ SRL()

void CPU::SRL ( )

private

Shift Right Logical.

References: Instruction::rt Instruction::shamt get_reg set_reg

Definition at line 277 of file ins_special.cpp.

◆ SUBU()

void CPU::SUBU ( )

private

Subtract Unsigned.

References: Instruction::rs Instruction::rt Instruction::rd get_reg set_reg

Definition at line 202 of file ins_special.cpp.

◆ SW()

void CPU::SW ( )

private

Store Word.

TODO: Implement Cache

References: set_reg get_reg write_32 Instruction::rt Instruction::rs cop0_status

Definition at line 45 of file ins.cpp.

◆ write16()

void CPU::write16	(	uint32_t	addr,
		uint16_t	data )

private

Write a 16 bit word to the bus.

Parameters

addr	Address to write to
data	Data to write to the bus

References Bus::write16_cpu

Definition at line 55 of file cpu_rw.cpp.

◆ write32()

void CPU::write32	(	uint32_t	addr,
		uint32_t	data )

private

Write a 32 bit word to the bus.

Parameters

addr	Address to write to
data	Data to write to the bus

References: Bus::write32_cpu

Definition at line 27 of file cpu_rw.cpp.

◆ write8()

void CPU::write8	(	uint32_t	addr,
		uint8_t	data )

private

Write a 8 bit word to the bus.

Parameters

addr	Address to write to
data	Data to write to the bus

References Bus::write8_cpu

Definition at line 83 of file cpu_rw.cpp.

Member Data Documentation

◆ bus

Bus* CPU::bus

private

Pointer to the Bus object.

Definition at line 175 of file cpu.hpp.

◆ cop0_bda

uint32_t CPU::cop0_bda

private

COP0 breakpoint exception register (data)

Generates an exception when address is accessed as a data load/store instead of instruction fetch.

Definition at line 247 of file cpu.hpp.

◆ cop0_bdam

uint32_t CPU::cop0_bdam

private

Bitmask applied to COP0 breakpoint exception register (data)

Used to trigger exception on a range of addresses.

Definition at line 261 of file cpu.hpp.

◆ cop0_bpc

uint32_t CPU::cop0_bpc

private

COP0 breakpoint exception register.

Generates an exception when the value of the register is equal to the value of the PC.

Definition at line 240 of file cpu.hpp.

◆ cop0_bpcm

uint32_t CPU::cop0_bpcm

private

Bitmask applied on COP0 breakpoint exception register.

Definition at line 267 of file cpu.hpp.

◆ cop0_cause

uint32_t CPU::cop0_cause

private

COP0 cause register.

Used to store the cause of the exception and is read-only. Apparently only [9:8] bits are writable to force an exception.

Definition at line 274 of file cpu.hpp.

◆ cop0_dcic

uint32_t CPU::cop0_dcic

private

COP0 breakpoint exception register (hardware)

TODO: Figure out what exactly this does.

Definition at line 254 of file cpu.hpp.

◆ cop0_status

uint32_t CPU::cop0_status

private

COP0 status register.

Used to store the status of the CPU.

Definition at line 233 of file cpu.hpp.

◆ hi

uint32_t CPU::hi = 0

private

HI register.

Used to store the higher 32 bits of the result of multiplication and remainder of division.

Definition at line 219 of file cpu.hpp.

◆ ins

Instruction CPU::ins

private

Instruction in the form of the Instruction structure.

Definition at line 206 of file cpu.hpp.

◆ ir

uint32_t CPU::ir

private

Instruction register.

Definition at line 194 of file cpu.hpp.

◆ ir_next

uint32_t CPU::ir_next

private

Instruction immediately after the current instruction in the memory.

Definition at line 200 of file cpu.hpp.

◆ lo

uint32_t CPU::lo = 0

private

LO register.

Used to store the lower 32 bits of the result of multiplication and quotient of division.

Definition at line 226 of file cpu.hpp.

◆ load_queue

std::queue<RegisterLoad> CPU::load_queue

private

Queue to store the loads to the general purpose registers.

Used to implement load delay.

Definition at line 182 of file cpu.hpp.

◆ lookup_cop0

std::map<uint8_t, void (CPU::*)()> CPU::lookup_cop0

private

Lookup table for cop0 instructions (opcode = 0b010000)

Definition at line 305 of file cpu.hpp.

◆ lookup_cop2

std::map<uint8_t, void (CPU::*)()> CPU::lookup_cop2

private

Lookup table for cop1 instructions (opcode = 0b010001)

Definition at line 311 of file cpu.hpp.

◆ lookup_mnemonic_op

std::map<uint8_t, std::string> CPU::lookup_mnemonic_op

private

Lookup table for the mnemonics of instructions.

Definition at line 317 of file cpu.hpp.

◆ lookup_mnemonic_special

std::map<uint8_t, std::string> CPU::lookup_mnemonic_special

private

Lookup table for the mnemonics of special instructions.

Definition at line 323 of file cpu.hpp.

◆ lookup_op

std::map<uint8_t, void (CPU::*)()> CPU::lookup_op

private

Lookup table for instructions.

Definition at line 293 of file cpu.hpp.

◆ lookup_special

std::map<uint8_t, void (CPU::*)()> CPU::lookup_special

private

Lookup table for special instructions (opcode = 0b000000)

Definition at line 299 of file cpu.hpp.

◆ pc

uint32_t CPU::pc = 0

private

Program counter.

Definition at line 188 of file cpu.hpp.

◆ regs

uint32_t CPU::regs[32] = {0xdeaddeed}

private

General purpose registers.

Definition at line 212 of file cpu.hpp.

The documentation for this class was generated from the following files:

include/core/cpu/cpu.hpp
core/cpu/cpu.cpp
core/cpu/cpu_conf.cpp
core/cpu/cpu_rw.cpp
core/cpu/cpu_utils.cpp
core/cpu/ins.cpp
core/cpu/ins_cop0.cpp
core/cpu/ins_cop2.cpp
core/cpu/ins_special.cpp

Public Member Functions

Private Member Functions

Private Attributes

Detailed Description

Constructor & Destructor Documentation

◆ CPU()

Member Function Documentation

◆ ADD()

◆ ADDI()

◆ ADDIU()

◆ ADDU()

◆ AND()

◆ ANDI()

◆ BEQ()

◆ BGEZ()

◆ BGEZAL()

◆ BGTZ()

◆ BLEZ()

◆ BLGE()

◆ BLTZ()

◆ BLTZAL()

◆ BNE()

◆ branch()

◆ clock()

◆ conf_ins_lookup()

◆ conf_mnemonic_lookup()

◆ connectBus()

◆ COP0()

◆ COP1()

◆ COP2()

◆ COP3()

◆ decode_and_execute()

◆ DIV()

◆ DIVU()

◆ get_reg()

◆ J()

◆ JAL()

◆ JALR()

◆ JR()

◆ LB()

◆ LBU()

◆ load_next_ins()

◆ load_regs()

◆ LUI()

◆ LW()

◆ MFC0()

◆ MFHI()

◆ MFLO()

◆ MTC0()

◆ OR()

◆ ORI()

◆ read16()

◆ read32()

◆ read8()

◆ reset()

◆ SB()

◆ set_reg()

◆ SH()

◆ show_regs()

◆ SLL()

◆ SLT()

◆ SLTI()

◆ SLTIU()

◆ SLTU()

◆ SPECIAL()

◆ SRA()

◆ SRL()

◆ SUBU()

◆ SW()

◆ write16()

◆ write32()

◆ write8()

Member Data Documentation

◆ bus

◆ cop0_bda

◆ cop0_bdam

◆ cop0_bpc

◆ cop0_bpcm

◆ cop0_cause

◆ cop0_dcic