ins_special.cpp

#include <sstream>
 
#include "core/cpu/cpu.hpp"
 
void CPU::SPECIAL()
{
    if(lookup_special.find(ins.funct()) != lookup_special.end())
    {
        (this->*lookup_special[ins.funct()])();
        return;
    }
    //throw unhandled instruction error
    std::stringstream ss;
    ss << "Unhandled instruction (SPECIAL): " << std::hex << ir;
    throw std::runtime_error(ss.str());
}
 
void CPU::SLL()
{
    set_reg(ins.rd(), get_reg(ins.rt()) << ins.shamt());
}
 
void CPU::OR()
{
    set_reg(ins.rd(), get_reg(ins.rs()) | get_reg(ins.rt()));
}
 
void CPU::SLTU()
{
    set_reg(ins.rd(), get_reg(ins.rs()) < get_reg(ins.rt()));
}
 
void CPU::ADDU()
{
    set_reg(ins.rd(), get_reg(ins.rs()) + get_reg(ins.rt()));
}
 
void CPU::JR()
{
    // std::cout << "Jumped to: " << std::hex << get_reg(ins.rs()) << "\n"; //REMOVE
    pc = get_reg(ins.rs());
}
 
void CPU::AND()
{
    set_reg(ins.rd(), get_reg(ins.rs()) & get_reg(ins.rt()));
}
 
void CPU::ADD()
{
    uint32_t extended_op1 = get_reg(ins.rt());
    uint32_t extended_op2 = get_reg(ins.rs());
    
    //check for signed overflow
    //TODO: Handle signed overflow exception
    if(((extended_op1 & 0x80000000) && (extended_op2 & 0x80000000) && (((extended_op1 + extended_op2) & 0x80000000) == 0))
        || (((extended_op1 & 0x80000000) == 0) && ((extended_op2 & 0x80000000) == 0) && ((extended_op1 + extended_op2) & 0x80000000)))
    {
        //throw signed overflow error
        std::stringstream ss;
        ss << "Signed overflow in ADD: " << std::hex << ir;
        throw std::runtime_error(ss.str());
    }
 
    set_reg(ins.rd(), extended_op1 + extended_op2);
}
 
void CPU::JALR()
{
    // uint32_t ra = pc + 4;
    uint32_t ra = pc;
    pc = get_reg(ins.rs());
    set_reg(ins.rd(), ra);
}
 
void CPU::SRA()
{
    uint32_t data = get_reg(ins.rt());
    uint32_t shamt = ins.shamt();
    uint32_t sign_bit = data & 0x80000000;
    for(uint32_t i = 0; i < shamt; i++)
    {
        data >>= 1;
        data |= sign_bit;
    }
    set_reg(ins.rd(), data);
}
 
void CPU::SUBU()
{
    set_reg(ins.rd(), get_reg(ins.rs()) - get_reg(ins.rt()));
}
 
void CPU::DIV()
{
    uint32_t op1 = get_reg(ins.rs());
    uint32_t op2 = get_reg(ins.rt());
    if(op2 == 0)
    {
        //throw division by zero error
        if(int32_t(op1) < 0)
        {
            lo = 1;
            hi = op1;
        }
        else
        {
            lo = 0xffffffff;
            hi = op1;
        }
        std::stringstream ss;
        ss << "Division by zero in DIV: " << std::hex << ir;
        throw std::runtime_error(ss.str());
    }
    if(op1 == 0x80000000 && op2 == 0xffffffff)
    {
        lo = 0x80000000;
        hi = 0;
        return;
    }
    lo = int32_t(op1) / int32_t(op2);
    hi = int32_t(op1) % int32_t(op2);
}
 
void CPU::MFLO()
{
    set_reg(ins.rd(), lo);
}
 
void CPU::SRL()
{
    uint32_t data = get_reg(ins.rt()) >> ins.shamt();
    set_reg(ins.rd(), data);
}
 
void CPU::DIVU()
{
    uint32_t op1 = get_reg(ins.rs());
    uint32_t op2 = get_reg(ins.rt());
 
    if(op2 == 0)
    {
        //throw division by zero error
        lo = 0xffffffff;
        hi = op1;
        std::stringstream ss;
        ss << "Division by zero in DIVU: " << std::hex << ir;
        throw std::runtime_error(ss.str());
    }
 
    lo = op1 / op2;
    hi = op1 % op2;
}
 
void CPU::MFHI()
{
    set_reg(ins.rd(), hi);
}
 
void CPU::SLT()
{
    int32_t op1 = get_reg(ins.rs());
    int32_t op2 = get_reg(ins.rt());
    set_reg(ins.rd(), op1 < op2);
}