37 uint32_t
opcode() {
return ins >> 26; }
44 uint32_t
rs() {
return (ins >> 21) & 0x1f; }
51 uint32_t
rt() {
return (ins >> 16) & 0x1f; }
58 uint32_t
rd() {
return (ins >> 11) & 0x1f; }
66 uint32_t
shamt() {
return (ins >> 6) & 0x1f; }
74 uint32_t
funct() {
return ins & 0x3f; }
81 uint32_t
imm() {
return ins & 0xffff; }
88 uint32_t
addr() {
return ins & 0x3ffffff; }
163 uint32_t
read32(uint32_t addr);
164 void write32(uint32_t addr, uint32_t data);
165 uint16_t
read16(uint32_t addr);
166 void write16(uint32_t addr, uint16_t data);
167 uint8_t
read8(uint32_t addr);
168 void write8(uint32_t addr, uint8_t data);
212 uint32_t
regs[32] = {0xdeaddeed};
277 void branch(uint32_t offset);
278 void set_reg(uint8_t reg, uint32_t data);
Class to implement the Bus.
Class to emulate the CPU.
std::map< uint8_t, std::string > lookup_mnemonic_op
Lookup table for the mnemonics of instructions.
uint8_t read8(uint32_t addr)
Read a 8 bit word from the bus.
void COP1()
Looks up and executes the appropriate coprocessor 1 instruction. (UNUSED)
void SLTIU()
Set on Less Than Immediate Unsigned.
void BEQ()
Branch on Equal.
void write16(uint32_t addr, uint16_t data)
Write a 16 bit word to the bus.
void BLGE()
Choose between BLTZAL, BGEZAL, BLTZ, BGEZ.
void clock()
Clocks the CPU once.
std::map< uint8_t, void(CPU::*)()> lookup_op
Lookup table for instructions.
uint32_t read32(uint32_t addr)
Read a 32 bit word from the bus.
void SLTU()
Set on Less Than Unsigned.
void LUI()
Load Upper Immediate.
std::map< uint8_t, void(CPU::*)()> lookup_cop0
Lookup table for cop0 instructions (opcode = 0b010000)
void SRA()
Shift Right Arithmetic.
CPU()
Construct a new CPU object.
void COP2()
Looks up and executes the appropriate coprocessor 2 (Graphics) instruction.
void SUBU()
Subtract Unsigned.
Bus * bus
Pointer to the Bus object.
std::map< uint8_t, std::string > lookup_mnemonic_special
Lookup table for the mnemonics of special instructions.
uint32_t cop0_bdam
Bitmask applied to COP0 breakpoint exception register (data)
uint32_t cop0_bpc
COP0 breakpoint exception register.
void conf_mnemonic_lookup()
Configures the mnemonic lookup table. (for debugging)
void BLEZ()
Branch on Less Than or Equal to Zero.
void load_next_ins()
Load the next instruction into the instruction register.
void branch(uint32_t offset)
Branches to the given offset.
uint32_t ir
Instruction register.
void BGEZAL()
Branch on Greater Than or Equal to Zero And Link.
void SLL()
Shift Left Logical.
void SLTI()
Set on Less Than Immediate.
void reset()
Resets the CPU to its initial state.
void MFC0()
Move From Coprocessor 0.
void conf_ins_lookup()
Configures the instruction lookup table.
uint32_t ir_next
Instruction immediately after the current instruction in the memory.
void SLT()
Set on Less Than.
void connectBus(Bus *bus)
Connects Bus to the CPU.
void SRL()
Shift Right Logical.
std::map< uint8_t, void(CPU::*)()> lookup_special
Lookup table for special instructions (opcode = 0b000000)
void LBU()
Load Byte Unsigned.
void J()
Unconditional Jump.
Instruction ins
Instruction in the form of the Instruction structure.
uint32_t cop0_status
COP0 status register.
void load_regs()
Loads the registers from the load queue.
void JALR()
Jump and Link Register.
void write8(uint32_t addr, uint8_t data)
Write a 8 bit word to the bus.
void write32(uint32_t addr, uint32_t data)
Write a 32 bit word to the bus.
uint32_t regs[32]
General purpose registers.
uint32_t cop0_dcic
COP0 breakpoint exception register (hardware)
void DIVU()
Divide Unsigned.
uint32_t cop0_bda
COP0 breakpoint exception register (data)
void ORI()
Bitwise OR Immediate.
void BLTZAL()
Branch on Less Than Zero And Link.
uint32_t pc
Program counter.
void ADDIU()
Add Immediate Unsigned.
void show_regs()
Shows the values of the registers.
void BNE()
Branch on Not Equal.
std::map< uint8_t, void(CPU::*)()> lookup_cop2
Lookup table for cop1 instructions (opcode = 0b010001)
void decode_and_execute()
Decodes and executes the instruction in the instruction register.
void ADDI()
Add Immediate.
uint32_t cop0_cause
COP0 cause register.
void set_reg(uint8_t reg, uint32_t data)
Sets the value of the given register from the general purpose registers.
uint32_t get_reg(uint8_t reg)
Gets the value of the given register from the general purpose registers.
void BGEZ()
Branch on Greater Than or Equal to Zero.
void SPECIAL()
Looks up and executes the appropriate SPECIAL instruction.
void BLTZ()
Branch on Less Than Zero.
void ANDI()
Bitwise AND Immediate.
void COP0()
Looks up and executes the appropriate coprocessor 1 instruction.
void COP3()
Looks up and executes the appropriate coprocessor 3 instruction. (UNUSED)
uint16_t read16(uint32_t addr)
Read a 16 bit word from the bus.
std::queue< RegisterLoad > load_queue
Queue to store the loads to the general purpose registers.
void MTC0()
Move to Coprocessor 0.
void BGTZ()
Branch on Greater Than Zero.
uint32_t cop0_bpcm
Bitmask applied on COP0 breakpoint exception register.
Structure to access different parts of an instruction by value.
uint32_t opcode()
Opcode of the instruction. Size: 6 bits [31-26].
uint32_t imm()
Immediate value for the instruction. Size: 16 bits [15-0].
uint32_t rt()
Target register for the instruction. Size: 5 bits [20-16].
uint32_t addr()
Address value for jump/branch instructions. Size: 26 bits [25-0].
uint32_t rd()
Destination register for the instruction. Size: 5 bits [15-11].
uint32_t funct()
Function field for the instruction. Size: 6 bits [5-0].
uint32_t rs()
Source register for the instruction. Size: 5 bits [25-21].
Instruction(uint32_t ins)
Construct a new Instruction object.
Instruction()
Construct a new Instruction object.
uint32_t shamt()
Shift amount for the instruction. Size: 5 bits [10-6].
Struture to store details of loads to the general purpose registers.
RegisterLoad(uint32_t reg, uint32_t data, uint32_t delay)
Construct a new RegisterLoad object with delay.
RegisterLoad(uint32_t reg, uint32_t data)
Construct a new RegisterLoad object with no delay.
uint32_t delay
Delay in clock cycles.
RegisterLoad()
Construct a new RegisterLoad object.
uint32_t data
Data to be loaded.